ARM Training Days Overview

Embedded systems are nothing without precision, and that’s why we’re offering three detailed ARM Training Days designed to help you excel at the central technologies you need to get ahead: mobile, hardware, and software.

Each Training Day can be purchased separately, so you can pick the topics you need. Or, if you want the three full days of training as well as conference and expo access, upgrade to the ARM TechCon All-Access Pass. And just a heads up: Single passes to ARM Training Days are limited, but an All-Access Pass guarantees you a seat at every event.

Mobile Training Day, Tues. Oct. 25, 2016

Learn from the experts how to optimize designs for the next wave of the mobile user experience. Optimizing for 64-bit, security in the cloud, the latest in virtual reality, and more will be covered in four detailed sessions throughout the day.

Click on each session below for more detail.

Time Description Speaker
11:30 AM – 12:15 PM Overview of Latest ARMv8 features and How to Optimize Your App for 64-bit
This session will introduce the ARMv8-A architecture, instruction set and programmer’s model and provide pointers to how you can leverage the new architecture to optimize the performance of your software on a 64-bit platform.
Chris Shore, Training Manager, Partner Enablement, ARM
12:15 PM – 1:00 PM Porting to 64-bit on ARM
Learn how to port high-level C code and native assembly language to 64 bit
Chris Shore, Training Manager, Partner Enablement, ARM
1:00 PM – 1:30 PM Deep Software Optimization: Video, Computer Vision and Machine Learning Algorithms on ARM
Many computation-intensive and high-throughput algorithms in computer vision, video, and machine learning were designed for desktop and server class systems, and therefore struggle on mobile or embedded platforms. This case-based presentation will provide a comprehensive overview of various optimization methods to make these algorithms run fast on low power, small footprint ARM platforms.
Alexey Rybakov, Senior Director, Embedded Systems, Luxoft
1:30 PM – 2:20 PM Optimizing Computer Vision and Deep Learning Algorithms on ARM Processors
With the recent developments in Computer Vision and Deep Neural Networks architectures, intelligent vision applications are becoming ubiquitous. The emerging of state-of-the-art approaches in Convolution Neural Networks coupled with recent advances in mobile computing performance have extended visual recognition capabilities to embedded devices and opened a wide range of new use cases. The aim of this talk is to show how computer vision applications can be efficiently optimized to target different ARM processors in your system using two key vision algorithms as examples.
Gian Marco Iodice, Software Engineer, ARM
2:20 PM – 2:30 PM Machine Learning and Computer Vision Demos Showcase
ARM and Luxoft will showcase their optimization methods implemented in different use cases demos.
Gian Marco Iodice, Software Engineer, ARM; Alexey Rybakov, Senior Director, Embedded Systems, Luxoft
2:30 PM – 3:15 PM Vulkan Graphics API: Giving developers explicit control of 'everything'
The Vulkan API is the first to be designed to work across all platform types. It helps designers take advantage of the latest ARM® architecture, such as multi-threading, more resource control and flexibility, memory management and how and when the tasks are executed in the graphics pipeline.
Mark Bellamy, Technology Specialist, ARM
3:15 PM – 4:15 PM Virtual Reality: Hundreds of Millions of Pixels in Front of Your Eyes
This presentation will explore how to use new Vulkan API to boost graphics performance at a reduced overhead, which is necessary to unlock the potential provided by contemporary GPU designs. We will also explore virtual reality (VR) and the development of specific extensions, including Multiview and priority context. We will then explore new VR features, including technologies such as texture-less MRT and adaptive resolution. In conclusion, the presentation will detail the VR and Vulkan work that ARM has been doing with the cutting-edge game engines such as Unity and UE4.
Roberto Lopez Mendez, Software Graphics Engineer, ARM
4:15 PM – 4:45 PM High Quality Mobile Virtual Reality
High quality mobile VR is demanding not only on GPUs but across the system. It requires close cooperation of many components, notably low-latency, zero-copy paths between video, GPU and display, as well as careful power management to ensure predictable timing within thermal limits, which is especially important with mobile VR.
Brad Grantham, Principal Software Engineer, ARM
4:45 PM – 5:30 PM Get the Most out of Android-N with Daydream VR Platform
Daydream is a VR platfrom built into the Android operating system in Android-N, including both software and hardware specifications.
Dan Galpin, Developer Advocate, Google

Hardware Training Day, Wed. Oct. 26, 2016

From prototyping silicon on FPGAs to debugging complex systems, gain deep-dive insights from our industry experts on the latest hardware design techniques.

Click on each session below for more detail.

Time Description Speaker
10:30 AM – 1:30 PM Wi-Fi + Linux + ARM + AXI + FPGA : from the I/O pin to the internet with snickerdoodle
The snickerdoodle development platform by krtkl combines ARM Cortex-A9 processing power with the programmability and re-configurability of FPGA programmable logic and Wi-Fi and Bluetooth connectivity. This session will cover ARM-FPGA SoC design workflow from the implementation of custom logic and I/O mapping to the abstraction and control of the implemented hardware using Linux. Attendees will learn the concepts behind configuring application-specific programmable logic and how to interface with the programmable logic and I/O from Linux running on the Cortex-A9. Guests will be presented with options for controlling the applications using snickerdoodle’s wireless interfaces for remote access and control.

  • 10:30 AM – 10:45 AM: Introduction to snickerdoodle – applications, design rationale, and architecture
  • 10:45 AM – 11:15 AM: Hooking up real-world I/O directly to snickerdoodle – a “hands on” hardware demo
  • 11:15 AM – 11:45 PM: I/O-to-Cortex-A9 interfacing with snickerdoodle reconfigurable FPGA fabric and the AMBA 4 AXI4 bus using Xilinx Vivado
  • 11:45 AM – 12:00 PM: Exporting hardware design and launching software development platform with Xilinx SDK for bootloader and application development
  • 12:00 PM – 12:15 PM: Break
  • 12:15 PM – 12:45 PM: System software and hardware bootloader generation and Linux system bring-up
  • 12:45 PM – 1:15 PM: Linux command line and application control of hardware interfaces with wireless connectivity demonstration
  • 1:15 PM – 1:30 PM: Summary, Q&A

Key Takeaways

  • Understanding of the design and implementation of hardware using available FPGA I/O and programmable logic
  • Abstraction of hardware design from Linux OS
  • Control of hardware implementation using Linux application
Jamil Weatherbee, CTO, krtkl inc.; Russell Bush, Chief Design Officer, krtkl inc.
1:30 PM – 2:30 PM Keynote Break
2:30 PM – 5:30 PM Future-proof SoCs: Adding Low Power Radio IP to Your SoC
This three-hour session covers considerations for designing-in radios into SoC projects and the anticipated changes in various radio standards. The session is divided into three parts:Part one focuses on understanding radio specifications as it applies to Bluetooth low energy radios, and will conclude with an overview of ARM Cordio® radio products and how they perform in the key metrics identified for this market.Part two reviews of some evaluation, integration, test, qualification, certification and board/system level challenges and how ARM Cordio radio IP addresses these demandsPart three concentrates on considerations for power consumption, memory footprint, modularity and maintainability of the code base when designing and developing a Bluetooth low energy compliant software protocol stack.Key Takeaways:

  • Radio specifications as it applies to Bluetooth low energy radios and ARM’s Cordio IP solution
  • Radio IP integration beyond SoC: integration, test, qualification/certification, system level challenges
  • Software design efficiency considerations
Prithi Ramakrishnan, Product Manager, Wireless Business Unit, ARM; Charles Dittmer, Technical Marketing Manager, ARM; Brian Blum, SW Technical Marketing Engineer, ARM

Software Training Day, Thurs. Oct. 27, 2016

Low-power and sub-volt systems are increasingly vital in application segments such as IoT. Discover new techniques to streamline software for power optimization and efficiency with insights from our design experts.

Click on each session below for more detail.

Time Description Speaker
10:30 AM – 1:30 PM Device Lifecycle Management With ARM mbed and a Professional-Grade RTOS
What happens when you combine the reliability of Micrium’s embedded RTOS components with the versatility of the mbed IoT Device Platform from ARM?  You get a powerful and modular foundation on which to build your IoT applications—a stable platform featuring a real-time kernel that has been successfully deployed in countless connected systems.  This hands-on workshop introduces a collection of highly capable software components from ARM and Micrium, with a focus on the easy-to-use and intuitive APIs that the software offers for cloud connectivity. You’ll gain exposure to the concepts, technology and techniques involved following through both expert-led discussion and engaging labs.Key Takeaways

  • The fundamental RTOS concepts typically involved in an IoT application
  • The basic structure of an IoT project incorporating both Micrium and the mbed IoT Device Platform
  • The simple procedure for connecting a Device to mbed cloud services
Christian Légaré, EVP & CTO, Micrium
1:30 PM – 4:20 PM Keeping Your Software Simple on Today's Complex SoCs
For today’s system-on-chips (SoCs), having a single, multi-core, high performance embedded processor isn’t enough. We now see SoCs combining multiple types of processors, such as an ARM® Cortex®-A/R CPU combination. These heterogeneous SoCs provide robust computing power, but the increased hardware complexity also complicates software. SoCs built with the latest ARM technology, however, provide additional features that help abstract these complexities from software. This session will discuss some of these features in detail, and how to take advantage of them to simplify software.

Key Takeaways – Learning outcomes:

  • Understand benefits and limitations of hypervisors in embedded systems and some example use cases
  • Write software to take advantage of key ARM CoreLink components including Cache Coherent Interconnect (CCI) and System Memory Management Unit (SMMU)
  • Implement a software framework across multiple processors in a heterogeneous SoC
Shaun Purvis, Embedded Systems Specialist & Trainer, Hardent