The other day, a colleague sent me a brief note that gave me a bit of a chuckle. The subject line was simply, “Huh?” and the note itself promised a reward if I could explain to him “in layman’s terms” what the heck “big.LITTLE” was. I understood where he was coming from — it’s an eye-catching appellation for what, to the uninitiated, might seem like a pretty confusing concept. But after I explained it to him, he replied, “Well, that’s genius!” And he’s right, the big.LITTLE concept is pretty genius. That’s why we’re shining today’s conference session spotlight on big.LITTLE. To be specific, the session titled “The Right Recipe for Mobile Computing’s big.LITTLE in 16nm Process,” which takes place 3:30-4:20 pm on Friday, Oct. 3.

If you’re planning to learn more about the genius of the big.LITTLE approach to multiprocessing, specifically for mobile computing, this session will discuss how to handle the associated complexity and functional design challenges when attempting to design a smartphone’s SoC, particularly with advanced process technologies such as FinFET. In this session, presenter Chek San Leong, manager of IP ecosystem at TSMC, will detail how to overcome some of these challenges via innovative methodology, implementation techniques, and optimized libraries. Chek will illustrate this through the jointly developed big.LITTLE technology test vehicle comprised of ARM Cortex-A57 and Cortex-A53 processors.

So get registered here right away, and join us in two weeks to become a little bit more of a big genius about big.LITTLE.