I’ll be posting blogs occasionally highlighting some of the outstanding sessions you’ll have the opportunity to attend at this year’s ARM TechCon 2013 at the Santa Clara Convention Center October 29-31. One of the differences you’ll notice at this year’s conference is the conscious decision to intermingle the hardware and software booths on the show floor in order to emphasize the collaboration between hardware and software in the maturing ARM ecosystem.
One of the tracks at the event that best demonstrates this collaboration between hardware and software is the “Marrying Software and Hardware in Multicore Design” track; and one of the sessions that is a can’t-miss in this track is titled “Writing Reliable Multicore Code.” It takes place 2:30 to 3:20 on the opening day of the show, Tuesday, October 29. In this session, we’ll be looking at the multicore environment, and how this cutting-edge hardware platform and concurrent threads add another dimension to the development challenge that is already sufficiently complex with other platforms. Because such a multithreaded environment creates many more ways for code to fail, many of these failures – even though they may be due not to quality control issues but rather to sheer complexity – may not show up during product testing and will only manifest later as costly product glitches. This class describes the top sources of run time errors in multicore systems and how to avoid them in order to write reliable code.
So if you’re a multicore design engineer or a software developer – or if you’re considering attending the show with a team of hardware and software developers – I encourage you to attend this session to learn more about writing reliable code for this emerging processor design. You’ll also make great contacts that can help you navigate through some tough design and development challenges in the times ahead.
And, as always, look me up at the show or tweet me at @briangillooly.